1. Field of the Invention
The present invention relates generally to computer memory.
2. Background Art
Conventional computer memories set a conservative minimum required supply voltage for the memory. This minimum memory supply voltage is typically determined by a voltage below which the first bitcell failure in the memory occurs.
When the memory is integrated with other circuit components (e.g., processor), the minimum memory supply voltage generally dictates the minimum supply voltage for the overall integrated circuit. (Though, the memory supply voltage may be separated from the supply voltage of the rest of the chip, doing so usually requires another supply regulator and impacts the timing of the memory). As such, the other circuit components are prevented from operating at voltages lower than the minimum memory supply voltage, even when the other circuit components are capable of or desire operating at lower voltages in reduced power/performance modes.
Further, even when a separate memory supply voltage is used, the minimum required memory supply voltage is typically set very conservatively that power savings can potentially be achieved by reducing the supply voltage below the minimum, before memory performance is affected in a significant way.
The present invention will be described with reference to the accompanying drawings. Generally, the drawing in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.